1. Field of the Invention
The present invention relates to a MOS field effect transistor (MOSFET).
2. Description of the Related Art
In recent years, a large-scale integrated circuit (LSI) in which a large number of transistors and resistors and the like are connected to obtain electrical circuits and integrated on a single chip has been frequently used in the important portion of a computer or a communication equipment. For this reason, the performance of the entire equipment greatly depends on the performance of the LSI itself. The performance of the LSI itself can be improved such that the integration density of semiconductor devices is increased by micropatterning to achieve a high-speed operation. A MOSFET is one of the most important semiconductor devices.
In a conventional high-frequency MOSFET, high-speed operation cannot be performed due to the parasitic capacitance between a semiconductor substrate and a drain region.
In a conventional high-breakdown-voltage MOSFET, although a necessary breakdown voltage can be assured, dielectric isolation between the devices is not sufficient. When the MOSFET is used as a high-side switch, a depletion layer extends in the device to undesirably increase the ON resistance.
In a conventional MOSFET formed on an SOI (semiconductor or silicon on insulator) substrate, when the main silicon layer of the SOI substrate is thin to increase the maximum operating frequency, the resistance between a channel region and a source electrode increases. In the worst case, the potential in the channel floats to make it impossible to assure a normal device operation.